fix: add missing verilog file extensions

This commit is contained in:
CJ van den Berg 2025-10-10 08:49:27 +02:00
parent 7dad2163a4
commit 35c356a867
Signed by: neurocyte
GPG key ID: 8EB1E1BB660E3FB9

View file

@ -558,7 +558,7 @@ pub const swift = .{
pub const verilog = .{
.description = "SystemVerilog",
.extensions = .{ "sv", "svh" },
.extensions = .{ "sv", "svh", "v", "vh" },
.comment = "//",
.highlights = "nvim-treesitter/queries/verilog/highlights.scm",
.injections = "nvim-treesitter/queries/verilog/injections.scm",